The present invention relates to the temperature control of integrated circuit (xe2x80x9cICxe2x80x9d) devices during testing. In particular, the invention relates to apparatus and methods for controlling the temperature of such devices when tested at wafer level.
Functional testing of IC devices is necessary to verify performance prior to shipping to an end user. It is desirable to test such devices as early as possible in the manufacturing process so that any non-functioning devices can be removed from the process before further expensive processing steps are applied. The earliest stage in manufacturing at which full functionality of the devices can be tested is at the end of the processing of the wafer on which the devices are formed. Testing at this stage, often known as xe2x80x9cwafer probing,xe2x80x9d has been used in previous testing strategies. Wafer prober interfaces are used as an interface with a test system. In a wafer prober interface, temporary contacts such as needles are placed into electrical contact with pads formed on the device, such as for power and input/output signals. The pads are formed while the device is still part of the wafer, that is, before the wafer is cut into individual or xe2x80x9csingulatedxe2x80x9d devices. A test pattern is then applied via these pads.
Thermal control of devices during testing has been recognized as an issue in testing of IC devices. One particular problem with testing IC devices is that they are tested before temperature control devices such as heat sinks and fans are attached. For devices in which the power dissipation of the chip is relatively constant or only varies in a small range, temperature control can be achieved by placing the device in contact with a large thermal mass, which is held at the desired temperature. This method is generally unsatisfactory, however, if the value of the power dissipation of the device varies over a wide range.
One approach to controlling the temperature of a device under test comprises placing the device in contact with a temperature forcing system. The temperature forcing system is used to vary the degree of cooling or heating in order to maintain the device at the desired temperature set point during the test. Control of such systems typically uses a feedback loop based on the output of a temperature sensor, which is in contact with the device or, in certain cases, built into the device itself.
Typical temperature forcing systems often use forced air convection systems that extend well beyond the desired forcing temperature range at both the hot and cold ends. In this way, an attempt can be made to accelerate the device""s temperature conditioning by overcooling or overheating. As the nominal power density of the devices continues to increase, the ability of forced air convection systems to overcool reaches practical limits, causing increases in the temperature error between the desired and actual temperatures. Another problem is the increased sensitivity that devices fabricated in the latest processes have to high temperatures. The potential for chip damage due to overheating adds risk to the use of the overheating approach. The combination of the limited ability to overcool and the need to be more conservative by not overheating results in an increased time to reach set point, with lost utilization of expensive test equipment and engineering personnel as the expense.
Another approach to the design of temperature forcing systems involves the use of dual liquid conduction systems, with one hot liquid and one cold liquid. The proportion of the liquids is mechanically metered to effect the desired forcing temperature. To achieve fast response times, this approach requires that the metering occur very close to the device. This imposes mechanical packaging constraints, which limit flexibility in bringing the surface of the temperature forcing system control surface into contact with the device or the device package. Even without these constraints, the mechanical metering of the dual liquids is slow in changing the forcing temperature when compared to the temperature changes induced by the device""s instantaneous power dissipation. This relatively slow change also causes increased error between the desired and actual temperatures.
Examples of the systems described above can be found in the following U.S. Pat. Nos. 5,420,521; 5,297,621; 5,315,240; 5,205,132; 5,309,090; 5,821,505; 5,172,049; and 4,734,872. Some systems only heat the chip and do not provide a means for removing heat from the chip. Other systems increase or lower the chip temperature with a gas jet or with an immersing liquid. In these latter systems, the temperature accuracy for the chip is limited by the speed at which the temperature of the gas jet or liquid can be increased or decreased.
To date, the approach used in wafer probing for temperature control is to provide a thermal mass in the form of a heated and/or cooled chuck on which the wafer is placed during testing. The chuck attempts to maintain the temperature of the whole wafer at a desired set point during testing. An example of such a system is the ThermoChuck available from Temptronic Corp. of Newton, Mass. However, it is not possible for such a system to respond to localized temperature changes arising from an individual high performance device on a wafer being tested at speed. This limitation has effectively prevented wafer probing from being used to test high performance devices at speed early in the manufacturing process.
A need has arisen for a temperature control system which overcomes or at least reduces some of the problems encountered in controlling the temperature of devices when using wafer probing for testing.
Briefly, according to one aspect of the invention, there is provided an apparatus for control of integrated circuit devices under test. The apparatus includes a heat exchanger having a surface disposed to contact each of the plurality of integrated circuit devices. The surface has a plurality of regions corresponding to respective ones of the plurality of integrated circuit devices. During testing, the temperature of each of the plurality of integrated circuit devices is individually controlled at each of the plurality of regions.
Consistent with this aspect of the invention, the heat exchanger may comprise a chuck having a plurality of heating elements disposed at each of the regions, and the chuck may include a heat sink wherein each of the heating elements regulates the temperature of a corresponding one of the regions at a temperature above a temperature determined by the heat sink.
Also consistent with this aspect of the invention, the temperature of each region may be individually controlled by a heating element disposed on a heat sink or by a plurality of heating elements disposed over a corresponding one of a plurality of heat sinks.
Also consistent with this aspect of the invention, the plurality of integrated circuit devices may be formed on a wafer and the surface may be disposed to contact the wafer such that the plurality of regions correspond to respective ones of the plurality of integrated circuit devices formed on the wafer. Alternatively, the plurality of integrated circuit devices may be singulated devices, and the surface is disposed to contact the singulated devices such that the plurality of regions correspond to respective ones of the singulated devices.
Briefly, according to another aspect of the invention, there is provided a method of controlling the temperature of a plurality of integrated circuit devices during testing. The method includes placing the plurality of integrated circuit device in contact with a respective one of a plurality of regions of a surface of a heat exchanger. The temperature of each of the plurality of integrated circuit devices at each of the plurality of regions is controlled individually.
Consistent with this aspect of the invention, the heat exchanger may comprise a chuck having a plurality of heating elements disposed at each of the regions, and the chuck may include a heat sink wherein each of the heating elements regulates the temperature of a corresponding one of the regions at a temperature above a temperature determined by the heat sink.
Also consistent with this aspect of the invention, the temperature of each region may be individually controlled by a heating element disposed on a heat sink or by a plurality of heating elements disposed over a corresponding one of a plurality of heat sinks.
Also consistent with this aspect of the invention, the plurality of integrated circuit devices may be formed on a wafer and the surface may be disposed to contact the wafer such that the plurality of regions correspond to respective ones of the plurality of integrated circuit devices formed on the wafer. Alternatively, the plurality of integrated circuit devices may be singulated devices, and the surface may be disposed to contact the singulated devices such that the plurality of regions correspond to respective ones of the singulated devices.
Briefly, according to another aspect of the invention, an apparatus for controlling, during testing, the temperature of multiple integrated circuit devices formed on a wafer, comprises a chuck for locating the devices during testing. The apparatus further comprises multiple temperature control devices arranged in the chuck to correspond with the arrangement on the wafer of the devices being tested.
Consistent with this aspect of the invention, the chuck may be provided with means for controlling its temperature during the testing, and the means for controlling the chuck temperature may comprise a supply of temperature-controlled fluid or an electrical device.
Also consistent with this aspect of the invention, the multiple temperature control devices may comprise heating elements, and a heat exchanger body may be provided for each heating element or a single heat exchanger body may be provided for the multiple heating elements.
Briefly, according to yet another aspect of the invention, a method of controlling the temperature of multiple integrated circuit devices formed on a wafer during testing comprises locating the wafer on a chuck for testing, the chuck including multiple temperature control devices arranged to correspond with the arrangement on the wafer of the devices being tested. The individual devices on the wafer are tested, and the temperature of the individual devices being tested are controlled on the wafer using the corresponding temperature control device.
Consistent with this aspect of the invention, the method may further comprise singulating the devices formed on the wafer before testing, wherein the singulated devices are arranged on the chuck in the same arrangement as when they were formed on the wafer.
In another aspect of the invention, the temperature of each of a plurality of integrated circuit devices is individually controlled based on the power usage of the integrated circuit devices.